The doctoral dissertations of the former Helsinki University of Technology (TKK) and Aalto University Schools of Technology (CHEM, ELEC, ENG, SCI) published in electronic format are available in the electronic publications archive of Aalto University - Aaltodoc.
Aalto

Integrated Radio Frequency Synthesizers for Wireless Applications

Rami Ahola

Dissertation for the degree of Doctor of Science in Technology to be presented with due permission of the Department of Electrical and Communications Engineering for public examination and debate in Auditorium S4 at Helsinki University of Technology (Espoo, Finland) on the 1st of April, 2005, at 12 o'clock noon.

Overview in PDF format (ISBN 951-22-7563-5)   [1409 KB]
Dissertation is also available in print (ISBN 951-22-7562-7)

Abstract

This thesis consists of six publications and an overview of the research topic, which is also a summary of the work. The research described in this thesis concentrates on the design of phase-locked loop radio frequency synthesizers for wireless applications. In particular, the focus is on the implementation of the prescaler, the phase detector, and the chargepump.

This work reviews the requirements set for the frequency synthesizer by the wireless standards, and how these requirements are derived from the system specifications. These requirements apply to both integer-N and fractional-N synthesizers. The work also introduces the special considerations related to the design of fractional-N phase-locked loops. Finally, implementation alternatives for the different building blocks of the synthesizer are reviewed.

The presented work introduces new topologies for the phase detector and the chargepump, and improved topologies for high speed CMOS prescalers. The experimental results show that the presented topologies can be successfully used in both integer-N and fractional-N synthesizers with state-of-the-art performance.

The last part of this work discusses the additional considerations that surface when the synthesizer is integrated into a larger system chip. It is shown experimentally that the synthesizer can be successfully integrated into a complex transceiver IC without sacrificing the performance of the synthesizer or the transceiver.

This thesis consists of an overview and of the following 6 publications:

  1. Ahola, R., Vikla, J., Lindfors, S., Routama, J., and Halonen, K., 1999. A 2 GHz phase-locked loop frequency synthesizer with on-chip VCO. Analog Integrated Circuits and Signal Processing 18, number 1, pages 43-54.
  2. Ahola, R., Routama, J., Lindfors, S., and Halonen, K., 1998. A novel phase detector with no dead zone and a chargepump with very wide output voltage range. Proceedings of the 24th European Solid-State Circuits Conference, pages 352-355. The Hague, The Netherlands, September 1998.
  3. Ahola, R., and Halonen, K., 2000. A 2 GHz ΔΣ fractional-N frequency synthesizer in 0.35 µm CMOS. Proceedings of the 26th European Solid-State Circuits Conference, pages 472-475. Stockholm, Sweden, September 2000.
  4. Ahola, R., and Halonen, K., 2003. A 1.76-GHz 22.6-mW ΔΣ fractional-N frequency synthesizer. IEEE Journal of Solid-State Circuits 38, number 1, pages 138-140.
  5. Ahola, R., and Halonen, K., 2003. A 4 GHz ΔΣ fractional-N frequency synthesizer. Analog Integrated Circuits and Signal Processing 34, number 2, pages 77-88.
  6. Ahola, R., Aktas, A., Wilson, J., Rama Rao, K., Jonsson, F., Hyyryläinen, I., Brolin, A., Hakala, T., Friman, A., Mäkiniemi, T., Hanze, J., Sandén, M., Wallner, D., Guo, Y., Lagerstam, T., Noguer, L., Knuuttila, T., Olofsson, P., and Ismail, M., 2004. A single-chip CMOS transceiver for 802.11a/b/g wireless LANs. IEEE Journal of Solid-State Circuits 39, number 12, pages 2250-2258.

Keywords: analog integrated circuit, frequency synthesizer, phase-locked loop, CMOS, BiCMOS, wireless communication, radio transceiver, prescaler, phase detector, chargepump, integer-N, fractional-N

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© 2005 Helsinki University of Technology

Last update 2011-05-26