The doctoral dissertations of the former Helsinki University of Technology (TKK) and Aalto University Schools of Technology (CHEM, ELEC, ENG, SCI) published in electronic format are available in the electronic publications archive of Aalto University - Aaltodoc.
Aalto

Direct Wafer Bonding for MEMS and Microelectronics

Tommi Suni

Dissertation for the degree of Doctor of Science in Technology to be presented with due permission of the Department of Materials Science and Engineering for public examination and debate in Auditorium V1 at Helsinki University of Technology (Espoo, Finland) on the 18th of August, 2006, at 12 noon.

Overview in PDF format (ISBN 951-38-6852-4)   [2914 KB]
VTT Publications 609, ISSN 1455-0849

Dissertation is also available in print (ISBN 951-38-6851-6)
Copyright © 2006 VTT Technical Research Centre of Finland
VTT Publications 609, ISSN 1235-0621
VTT-PUBS-609
TKK-DISS-2167

Abstract

Direct wafer bonding is a method for fabricating advanced substrates for microelectromechanical systems (MEMS) and integrated circuits (IC). The most typical example of such an advanced substrate is the silicon-on-insulator (SOI) wafer. SOI wafers offer many advantages over conventional silicon wafers. In IC technology, the switching speed of circuits fabricated on SOI is increased by 20-50% compared to circuits fabricated on a bulk Si wafer. The required operation voltage is lower in ICs on SOI than in ICs on a bulk silicon wafer, which decreases power consumption and chip heating. In the MEMS industry, the buried oxide layer works as a good sacrificial layer during release etching of diaphragms, beams etc. and offers an excellent etch stop layer for silicon etching. Direct wafer bonding can also be used in the fabrication of more complex structures than SOI. The wafers to be bonded can be of different materials, can contain patterns, and may have multiple layers or ready-made devices.

This thesis reports on studies of direct wafer bonding and its use in various applications. Different bonding processes used in microelectronics are briefly described. The main focus of this thesis is on the plasma activation-based low temperature bonding process, and on the control of bond strength by surface preparation.

A novel method for bond strength measurement is introduced. This method, based on buried oxide etching, is presented and compared with other methods used in evaluating bond quality.

This thesis also contains results on research of different applications requiring direct wafer bonding. Heterogeneous integration, pre-processed SOI fabrication, and wafer scale packaging are the main application topics.

This thesis consists of an overview and of the following 6 publications:

  1. T. Suni, K. Henttinen, I. Suni, and J. Mäkinen. Effects of plasma activation on hydrophilic bonding of Si and SiO2. Journal of The Electrochemical Society, Vol. 149, No. 6, (2002), pp. G348-G351. © 2002 The Electrochemical Society. By permission.
  2. T. Suni, K. Henttinen, A. Lipsanen, J. Dekker, H. Luoto, and M. Kulawski. Wafer scale packaging of MEMS by using plasma-activated wafer bonding. Journal of The Electrochemical Society, Vol. 153, No. 1, (2006), pp. G78-G82. © 2006 The Electrochemical Society. By permission.
  3. T. Suni, K. Henttinen, J. Dekker, H. Luoto, M. Kulawski, J. Mäkinen, and R. Mutikainen. Silicon-on-insulator wafers with buried cavities. Journal of The Electrochemical Society, Vol. 153, No. 4, (2006), pp. G299-G303. © 2006 The Electrochemical Society. By permission.
  4. T. Suni, J. Kiihamäki, K. Henttinen, I. Suni, and J. Mäkinen. Characterization of bonded interface by HF etching method. In: Semiconductor Wafer Bonding: Science, Technology and Applications VII, edited by C. Hunt, H. Baumgart, S. Bengtsson, and T. Abe, The Electrochemical Society, pp. 70-75, 2003. © 2003 The Electrochemical Society. By permission.
  5. K. Henttinen, T. Suni, A. Nurmela, M. Kulawski, and I. Suni. Mechanical delamination for the materials integration. In: Semiconductor Wafer Bonding: Science, Technology and Applications VII, edited by C. Hunt, H. Baumgart, S. Bengtsson, and T. Abe, The Electrochemical Society, pp. 359-367, 2003. © 2003 The Electrochemical Society. By permission.
  6. K. Henttinen, T. Suni, A. Nurmela, H. Luoto, I. Suni, V.-M. Airaksinen, S. Karirinne, M. Cai, and S. S. Lau. Transfer of thin Si layers by cold and thermal ion-cutting. Journal of Materials Science: Materials in Electronics, 14, (2003), pp. 299-303. © 2003 Springer Science+Business Media. By permission.

Keywords: direct wafer bonding, MEMS, microelectronics, microelectromechanical systems, SOI, silicon-on-insulator, integrated circuits, bond strength measurement, heterogeneous integration, pre-processed SOI fabrication, wafer-scale packaging, plasma activation

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© 2006 Helsinki University of Technology

Last update 2011-05-26